1. Technical Field
The present invention relates generally to storage devices, and more particularly to a storage device having per-element selectable power supply voltages.
2. Description of the Related Art
Storage array energy usage vs. performance is a critical trade-off in present-day processing systems. System memory, as well as internal and external processor caches and internal registers, consume a large portion of total system power, particularly in network server systems in which processors and memory modules form the majority of components in the typical server rack. In order to maximize performance, or to provide a specified maximum performance level, the frequency at which the storage arrays are operated is typically raised to a level at which energy consumption limits or diminishing returns are encountered, performance limitations of the technology are encountered, and/or power dissipation limits are reached.
In particular, storage arrays such as static random access memories (SRAMs) have a performance profile in which stability/writability and access time all improve with voltage over the power supply voltage region over which the SRAMs are typically operated. However, as the power supply voltage provided to such storage devices is increased, the power consumption increases dramatically, due to the proportionality of logic transition energy to the square of the voltage. Therefore, while it is desirable to operate such devices at the high end of their practical voltage range, it is also necessary to curtail power requirements for a number of reasons, including power usage, heat generation and reliability reduction.
Below the limits of the technology itself, the primary control of the maximum frequency performance of storage arrays is their operating voltage, which is also the primary factor determining energy usage. Therefore, a tradeoff between energy consumption and performance is typically present. However, the operating voltage for a given performance level also sets a production yield criteria on the storage array devices themselves, as each device typically has a minimum operating voltage at which each element in the storage array will perform reliably and therefore across a production run, a particular specified minimum operating voltage dictates a yield of devices that will operate at that voltage across other ranges of environmental parameters such as temperature.
Within a storage array device or other device incorporating a storage array, the minimum operating voltage for various individual element partition levels, e.g., sub-array, column, row or individual cell varies due to variations across the die and the particular design architecture which may place higher performance burdens on particular positions of the elements. However, since the supply voltage is typically distributed as evenly as possible across the array, the minimum reliable operating voltage for the worst-case storage cell typically dictates the minimum operating voltage for the entire storage array. Therefore, the minimum operating voltage for a particular storage array design therefore dictates the minimum nominal energy consumption level for a particular frequency of operation/access to the storage subsystems or processing devices incorporating the storage device design.
It is therefore desirable to provide a storage array device having a reduced energy consumption while meeting yield and performance requirements at a specified operating frequency and environment.